JPH0258781B2 - - Google Patents
Info
- Publication number
- JPH0258781B2 JPH0258781B2 JP57026401A JP2640182A JPH0258781B2 JP H0258781 B2 JPH0258781 B2 JP H0258781B2 JP 57026401 A JP57026401 A JP 57026401A JP 2640182 A JP2640182 A JP 2640182A JP H0258781 B2 JPH0258781 B2 JP H0258781B2
- Authority
- JP
- Japan
- Prior art keywords
- type
- layer
- region
- substrate
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57026401A JPS58142542A (ja) | 1982-02-18 | 1982-02-18 | 誘電体分離構造の半導体集積回路装置の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57026401A JPS58142542A (ja) | 1982-02-18 | 1982-02-18 | 誘電体分離構造の半導体集積回路装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58142542A JPS58142542A (ja) | 1983-08-24 |
JPH0258781B2 true JPH0258781B2 (en]) | 1990-12-10 |
Family
ID=12192529
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57026401A Granted JPS58142542A (ja) | 1982-02-18 | 1982-02-18 | 誘電体分離構造の半導体集積回路装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58142542A (en]) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4721682A (en) * | 1985-09-25 | 1988-01-26 | Monolithic Memories, Inc. | Isolation and substrate connection for a bipolar integrated circuit |
JP3826161B2 (ja) * | 1995-06-08 | 2006-09-27 | 株式会社 日本触媒 | バナジウム含有触媒およびその製造方法、並びに、その使用方法 |
-
1982
- 1982-02-18 JP JP57026401A patent/JPS58142542A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS58142542A (ja) | 1983-08-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0052450B1 (en) | Method of manufacturing a semiconductor device with polycrystalline semiconductor cum metal electrodes | |
US4445268A (en) | Method of manufacturing a semiconductor integrated circuit BI-MOS device | |
US4481706A (en) | Process for manufacturing integrated bi-polar transistors of very small dimensions | |
US5424572A (en) | Spacer formation in a semiconductor structure | |
EP0097379A2 (en) | Method for manufacturing semiconductor devices | |
JPH05347383A (ja) | 集積回路の製法 | |
EP0253059A2 (en) | Process for suppressing the rise of the buried layer of a semiconductor device | |
US4412378A (en) | Method for manufacturing semiconductor device utilizing selective masking, etching and oxidation | |
JPS62588B2 (en]) | ||
JPH07118478B2 (ja) | 横方向トランジスタの製造方法 | |
JPH0361337B2 (en]) | ||
US4343080A (en) | Method of producing a semiconductor device | |
US20030080394A1 (en) | Control of dopant diffusion from polysilicon emitters in bipolar integrated circuits | |
US4949153A (en) | Semiconductor IC device with polysilicon resistor | |
US5480816A (en) | Method of fabricating a bipolar transistor having a link base | |
US5319234A (en) | C-BiCMOS semiconductor device | |
JPH0241170B2 (en]) | ||
JPH0258781B2 (en]) | ||
EP0724298B1 (en) | Semiconductor device with bipolar transistor and fabrication method thereof | |
JPH03190139A (ja) | 半導体集積回路装置 | |
RU2244985C1 (ru) | Способ изготовления комплементарных вертикальных биполярных транзисторов в составе интегральных схем | |
JPS632143B2 (en]) | ||
JP2697631B2 (ja) | 半導体装置の製造方法 | |
JPS5984469A (ja) | 半導体装置の製造方法 | |
JP2745946B2 (ja) | 半導体集積回路の製造方法 |